In recent years, there have been known a variety of structures (as referred to JP-A-2000-208661 (FIG. 2(d) and so on)), in which a wiring substrate (such as an IC chip mounting substrate or an IC package substrate) mounted with an IC chip and a printed circuit substrate such as a mother board are connected not directly but through an intermediate substrate called the “interposer” with each other.
Moreover, the IC chip to be used in the structure of that kind is generally formed of a semiconductor material (e.g., silicon) having a thermal expansion coefficient of about 2.0 ppm/° C. to 5.0 ppm/° C. On the other hand, the intermediate substrate and the wiring substrate are frequently formed of a resin material having a far larger thermal expansion coefficient.
At present, however, there is not known the structure, in which the intermediate substrate is interposed between the IC chip and the IC chip mounting substrate.
In order to realize the structure, in which the intermediate substrate is interposed between the IC chip and the IC chip mounting substrate, therefore, we have conceived of forming upper face pads for mounting the IC chip on the upper face of an intermediate substrate and forming lower face pads to be connected with the IC chip mounting substrate, on the lower face of the intermediate substrate. We also have conceived of providing a plurality of conductor columns extending in the thickness direction of the intermediate substrate thereby to connect and make conductive the upper face pad group and the lower face pad group directly through those conductor columns. We have further conceived of forming solder bumps, if necessary, over the upper face pads and the lower face pads.